1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and a fabrication method thereof and to a semiconductor integrated circuit incorporating an analog circuit and/or a digital circuit and a fabrication method thereof.
2. Description of the Related Art
The market expects that wireless network, and downsizing and reduced power consumption of mobile phones will be realized in preparations for the forthcoming ubiquitous era. For this purpose, it is earnestly desired that LSIs and memory to be incorporated in terminals have higher operation speed and higher integration and require lower power consumption. There are a number of radio communication standards including Bluetooth and wireless local area network. To accommodate several radio communication standards in accordance with uses, demands are increasing for semiconductor circuits of the type incorporating both a high-frequency analog circuit for radio communications and a digital circuit for logic operations.
Hitherto, semiconductor circuits for radio communications for use in mobile phones and the like have been fabricated by the so-called “BiCMOS technology” which provides a BiCMOS incorporating both a bipolar transistor and a complementary MOS transistor (complementary metal oxide semiconductor transistor, to be abbreviated as “CMOS” hereinafter). A MOS transistor has a basic structure comprising a metal, an oxide and a semiconductor in which a gate insulator comprising the oxide is formed on the semiconductor and a gate electrode comprising the metal is formed on the gate insulator. At present, the main stream is the technology called “SiGe BiCMOS technology”, which uses a hetero bipolar transistor including a SiGe base layer (hereinafter will be referred to as “SiGe hetero bipolar transistor”) as the bipolar transistor. The concept of the SiGe BiCMOS technology is illustrated in FIG. 11A. According to the SiGe BiCMOS technology, as illustrated in FIG. 11A, a semiconductor integrated circuit 301 formed by a single chip has an analog signal processing section 3 and a digital signal processing section 2, wherein the transistor of the analog signal processing section 3 which calls for high performance consists of a SiGe hetero bipolar transistor, whereas the other transistor of the analog signal processing section 3 and all the transistors of the digital signal processing section 2 each consist of a complementary MOS transistor comprising ordinary MOS transistors (hereinafter will be referred to as “normal CMOS”). One of the advantages of such SiGe BiCMOS technology is that both a SiGe hetero bipolar transistor and a normal CMOS can be incorporated in a semiconductor integrated circuit and, hence, a high-performance semiconductor integrated circuit incorporating both an analog circuit and a digital circuit can be realized on a single chip, which leads to a lower cost than is required to fabricate an integrated circuit with plural chips including a compound chip of a group III–V semiconductor such as GaAs and a normal CMOS chip. However, the SiGe BiCMOS technology requires a lengthy bipolar transistor forming process and, by comparison, the number of process steps required of the SiGe BiCMOS process is about 1.5 times as large as that required of an ordinary CMOS process. For this reason, the SiGe BiCMOS technology is more costly than the technology using normal CMOSs for all the required CMOSs (hereinafter will be referred to as “ordinary CMOS technology”). In terms of device characteristics, the threshold voltage of a bipolar transistor is determined by the diffusion potential between the base and the emitter; however, there is a limit to the threshold voltage (about 0.55V). For this reason it is said that any further reduction in voltage or power consumption is impossible.
In view of this situation, attention has recently been focused on the so-called RF CMOS technology (radio frequency CMOS technology) intended to construct a high-frequency analog circuit comprising a CMOS, which is less costly and allows a reduction in voltage to be realized. This technology has started being put to practical use. FIG. 11B illustrates the concept of the RF CMOS technology. According to the RF CMOS technology, as illustrated in FIG. 11B, a semiconductor integrated circuit 301 formed by a single chip has an analog signal processing section 3 and a digital signal processing section 2, wherein a CMOS of the analog signal processing section 3 which calls for high performance consists of a so-called RF CMOS, whereas the other CMOS of the analog signal processing section 3 and all the CMOSs of the digital signal processing section 2 consist of a normal CMOS each. Since such RF CMOS technology realizes a one-chip integrated circuit by forming both an analog circuit and a digital circuit with use of CMOSs only, the number of additional process steps is small and, hence, the required cost can be kept comparable to the cost required of the normal CMOS technology. However, the RF CMOS is inferior to the bipolar transistor in performance characteristics, such as mutual conductance and low-frequency noise, which are important parameters as analog characteristics. A problem with the present state of this technology is to improve these performance characteristics.
There is known a technique of enhancing the performance of a CMOS, according to which a CMOS comprising heterojunction MOS transistors (hereinafter will be referred to as “HCMOS”) and a MOS transistor are formed on the same substrate (see Japanese Patent Laid-Open Publication No. HEI 10-214906, paragraph [0112]).
A strained silicon CMOS has been proposed as another technique of enhancing the performance of a CMOS (see Japanese Patent Laid-Open Publication No. 2002-94060).
As a technique of enhancing the performance of a MOS transistor itself, a heterojunction dynamic threshold MOS transistor (hereinafter will be abbreviated as “HDTMOS”) has been proposed (see Japanese Patent Laid-Open Publication No. 2002-314089).
A strained silicon MOS transistor has been proposed as another technique of enhancing the performance of a MOS transistor itself (see J. L. Hoyt and other seven persons, Strained Silicon MOSFET Technology, International Electron Device Meeting (IEDM) 2002, P23–26).
The performance of a CMOS has so far been improved through scale down. However, the low-frequency noise, which is an important parameter among analog characteristics, tends to become serious by scale down. For this reason, a low-cost, one-chip semiconductor integrated circuit incorporating both a high-frequency analog circuit of high performance and a digital circuit, has not been realized yet as a semiconductor integrated circuit having a communication function which is expected to grow from now on.